
C8051F380/1/2/3/4/5/6/7/C
D OCUMENT C HANGE L IST
Revision 0.2 to Revision 1.0
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Updated Electrical Characteristics tables with latest data: Table 4.2, Table 4.4, Table 4.5, Table 4.7,
Table 4.8, Table 4.10, Table 4.11 and Table 4.12.
Changed bit REG01CN.5 to Reserved in SFR Definition 8.1 and updated corresponding descriptions in
sections 16.9 and 18.3.1.
Updated Figure 18.1. Oscillator Options.
Changed SFR Page in SFR Definition 21.2.
Updated descriptions of XOSCMD for Capacitor and RC modes in SFR Definition 18.6.
Revision 1.0 to Revision 1.1
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Updated front-page diagram to reflect the correct number of Timers, 6 instead of 4.
Updated Table 3.2, “TQFP-48 Package Dimensions,” on page 26 with the following:
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right-most column name from Min to Max
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max values for dimensions A, A1, A2, b, c, L, and q
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Updated Figure 3.8 and Table 3.6 with correct QFN-32 package drawing and dimensions.
Updated Table 5.10, “ADC0 Electrical Characteristics,” on page 42 with new maximum value for ADC0
Power Supply Current. This addresses an item from the May 18th, 2012 Errata.
Added Section 6.2 regarding the Temperature Sensor.
Updated Table 15.1, “Special Function Register (SFR) Memory Map,” on page 112 to fill in the missing
row information for the 0xC8 row.
Updated Table 16.1, “Interrupt Summary,” on page 120. The TMR4CN register is not bit-addressable.
Updated definition for the 000b value of the CLKSL bits in SFR Definition 19.1 (CLKSEL) to include the
/4 factor.
Revision 1.1 to Revision 1.2
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Revision 1.2 to Revision 1.3
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Added the “4. Typical Connection Diagrams” chapter.
Removed Figure 8.1, Figure 8.2, Figure 8.3, and Figure 8.4. These figures were replaced with a
reference to the “4. Typical Connection Diagrams” chapter.
Revision 1.3 to Revision 1.4
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Added new device C8051F38C.
Updated Flash Endurance minimum specification, Flash Erase Cycle Time maximum specification, and
Updated Figure 22.1 to show proper clock sources for SMBus0 and SMBus1.
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Rev. 1.4